Endless Energy Is Harvesting's Promise

Endless Energy Is Harvesting's Promise
EE Times (02/27/06)No. 1412, P. 1; Brown, Chappell

Energy harvesting, the technique of gleaning power from extreme environments, has begun to attract the interest of commercial developers for the potential it offers for creating self-sustaining electronic systems, weaning the consumer electronics industry away from its dependence on the battery. Energy can be drawn from the environment from vibration, strain, inertia, and magnetism, as well as heat and light. For instance, strain and vibration can translate directly into electricity through the application of piezoelectric materials. Replacing batteries is a lofty goal, and researchers have yet to produce a device that rivals its low cost and reliability. Dust Networks founder and CTO Kris Pister sees the convergence of sensing, computation, and power following the pace of Moore's Law and eventually scaling down to a theoretical zero in size. While at the University of California, Berkeley, Pister focused on reducing the power consumption of circuits, and has turned his attention to software since founding Dust Networks. Pister sees economic potential in energy harvesting techniques, such as photovoltaic cells, that could extend the life of the battery, rather than attempting to replace it altogether. Photovoltaics is the most advanced energy harvesting technique, and has the advantages of low cost and abundant availability. In addition to photovoltaic technologies, MicroStrain is developing piezoelectric materials to monitor the structural integrity of a building through the use of strain sensors. "At the end of the day, wireless networks will always be hampered by the need to change batteries," said MicroStrain's Michael Robinson. "Harvesting energy is the only way to avoid that." The implementation of energy harvesting techniques is predicated on the low-power design of electronics, which is beginning to appear, particularly in microprocessors. Leakage remains a central problem for new parallel architectures, however, posing a critical challenge to semiconductor designers.
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